Samsung Foundry Forum 2024 took place in San Jose on June 12
SAN JOSE — Samsung Electronics Co. will launch three-dimensional (3D) packaging services for high-bandwidth memory (HBM) within the year, a technology expected to be introduced for the artificial intelligence chip’s sixth-generation model HBM4 due in 2025, according to the company and industry sources.
On June 20, the world’s largest memory chipmaker unveiled its latest chip packaging technology and service roadmaps at the Samsung Foundry Forum 2024 held in San Jose, California.
It was the first time Samsung to release the 3D packaging technology for HBM chips in a public event. Currently, HBM chips are packaged mainly with the 2.5D technology.
It came about two weeks after Nvidia co-founder and Chief Executive Jensen Huang unveiled the new-generation architecture of its AI platform Rubin during a speech in Taiwan.
HBM4 will likely be embedded in Nvidia’s new Rubin GPU model expected to hit the market in 2026.
VERTICAL CONNECTION
Samsung’s latest packaging technology features HBM chips stacked vertically on top of a GPU to further accelerate data learning and inference processing, a technology regarded as a game changer in the fast-growing AI chip market.
Currently, HBM chips are horizontally connected with a GPU on a silicon interposer under the 2.5D packaging technology.
By comparison, 3D packaging does not require a silicon interposer, or a thin substrate that sits between chips to allow them to communicate and work together.
Samsung dubs its new packaging technology as SAINT-D, short for Samsung Advanced Interconnection Technology-D.
Samsung’s foundry business chief Choi Si-young unveils new chipmaking technology at Samsung Foundry Forum (SFF) 2024 in San Jose
TURNKEY SERVICE
The South Korean company is understood to offer 3D HBM packaging on a turnkey basis.
To do so, its advanced packaging team will vertically interconnect HBM chips produced at its memory business division with GPUs assembled for fabless companies by its foundry unit.
“3D packaging reduces power consumption and processing delays, improving the quality of electrical signals of semiconductor chips,” said a Samsung Electronics official.
In 2027, Samsung plans to introduce all-in-one heterogeneous integration technology that incorporates optical elements that dramatically increase the data transmission speed of semiconductors into one unified package of AI accelerators.
In line with the growing demand for low-power, high-performance chips, HBM is projected to make up 30% of the DRAM market in 2025 from 21% in 2024, according to TrendForce, a Taiwanese research company.
MGI Research forecast the advanced packaging market, including 3D packaging, to grow to $80 billion by 2032, compared with $34.5 billion in 2023.
By Jeong-Soo Hwang
hjs@hankyung.com
Yeonhee Kim edited this article